Cross-Sector entity
Of the tracked stories, 4 of 4 also mention DLI Scheme, the most common co-covered peer. The clearest coverage concentration is funding: 3 of 4 stories, with the rest divided among 1 other category. The tracked stories average 3 original sources each.
4 verified stories tracked
Last mentioned: Feb 19, 2026
Entity pulse
Coverage balance Positive coverage leads. Positive coverage exceeds negative coverage by 100 percentage points.
Figures are computed live from our source-verified story record — see our methodology for how impact and sentiment are derived.
Of the tracked stories, 4 of 4 also mention DLI Scheme, the most common co-covered peer. The clearest coverage concentration is funding: 3 of 4 stories, with the rest divided among 1 other category. The tracked stories average 3 original sources each. Vervesemi appears in 4 tracked Cross-Sector stories from February 19, 2026.
Computed from the 4 stories linked to this entity. Beat comparisons are omitted because no baseline was available for this window.
Coverage cohort
Other entities that clear the same relevance threshold in stories also covering Vervesemi. Shared-story counts are live from our verified record — not editorial picks.
Indian fabless semiconductor startup Vervesemi has raised $10 million in a Series A funding round to accelerate its chip design capabilities. Supported by the government's Design Linked Incentive (DLI) Scheme, the capital injection marks a significant milestone in India's ambition to build a self-reliant domestic semiconductor industry.
Indian fabless semiconductor startup Vervesemi has raised $10 million in a Series A funding round to accelerate the development of high-performance analog and mixed-signal ICs. The company, a key beneficiary of the government's Design Linked Incentive (DLI) scheme, aims to strengthen India's position in the global semiconductor value chain.
Indian fabless semiconductor startup Vervesemi has raised $10 million in a Series A funding round to accelerate its high-performance analog and mixed-signal IP development. The company, a beneficiary of the government's Design Linked Incentive (DLI) Scheme, aims to strengthen India's position in the global semiconductor design value chain.
Indian fabless semiconductor startup Vervesemi has raised $10 million in a Series A funding round to accelerate its high-performance analog and mixed-signal chip design. Supported by the government's Design Linked Incentive (DLI) scheme, the company is positioning itself as a critical supplier for the burgeoning electric vehicle and industrial automation sectors.
Source: PSU Connect · EVreporter •
